Taiwan Approves USD 44 Billion for TSMC's Massive US Expansion
Taiwan approves USD 44 billion in TSMC investments for massive Arizona expansion, part of a massive USD 265 billion global chip strategy.
In a massive move for the global semiconductor landscape, Taiwan’s Ministry of Economic Affairs (MOEA) has officially cleared USD 44 billion in investments by Taiwan Semiconductor Manufacturing Co. (TSMC) for its operations in the United States. This approval marks a significant milestone in the chip giant's ambitious plan to expand its manufacturing footprint in Arizona.
Since December 2020, the regulatory authority has greenlit seven separate outbound investment filings from the foundry leader. These funds are part of a staggering broader investment strategy that aims to solidify TSMC's presence in the American market while navigating the complexities of global supply chains.
A Timeline of Massive Capital Outlays
The financial journey of TSMC's American expansion began with a foundational step in late 2020. According to official records from the MOEA's Department of Investment Review, the investment tranches progressed as follows:
- December 2020: An initial USD 30.001 million to establish the American subsidiary, TSMC Arizona.
- December 2020: A subsequent USD 3.47 billion injection.
- March 2023: USD 3.5 billion authorized.
- September 2023: USD 4.5 billion approved.
- June 2024: USD 5.0 billion cleared.
- September 2024: USD 7.5 billion allocated.
- July 2025: A massive USD 20 billion tranche.
With these approvals, the momentum shows no signs of slowing down. The ministry noted that TSMC is expected to submit further investment petitions for administrative clearance in the near future.
The Arizona Blueprint: From Three to Six Fabs
The scale of the Arizona project has grown exponentially. While the original blueprint involved a USD 65 billion commitment, TSMC announced in March 2025 that it plans to add an additional USD 100 billion to its Arizona operations. This brings the total planned investment to a monumental USD 265 billion.
TSMC Chairman C.C. Wei highlighted during a mid-July investor conference that this extra capital will be used to:
- Increase the number of planned advanced wafer fabrication facilities from three to six.
- Expand integrated circuit (IC) packaging capacity with two advanced assembly units.
- Establish a dedicated research facility to drive future innovation.
Reflecting this aggressive growth, the company also revised its 2026 capital expenditure target upward to a range of USD 60 billion to USD 64 billion, up from the previous estimate of USD 52 billion to USD 56 billion.
Maintaining Taiwan's Semiconductor Supremacy
Despite the heavy capital flow toward the United States, the MOEA has been clear about its strategic priorities. The ministry is committed to ensuring that Taiwan remains the undisputed heart of the global chip industry. Their strategy rests on three pillars:
- Ensuring the largest portion of manufacturing capacity remains in Taiwan.
- Keeping the most advanced technologies within the country.
- Maintaining the world's most complete semiconductor industry ecosystem on Taiwanese soil.
Currently, TSMC maintains its primary industrial gravity in Taiwan, operating 19 advanced wafer fabs and packaging facilities. The company is also actively developing 13 additional facilities across major hubs including Hsinchu, Taichung, Chiayi, Tainan, and Kaohsiung.
Pushing the Limits of Physics: The Road to A14
While the US expands, Taiwan continues to lead the technological frontier. The company has already entered commercial manufacturing for the 2-nanometre (2nm) node, the most sophisticated standard currently in volume production. Looking further ahead, the proprietary A14 process is projected to begin commercial rollouts by 2028.
Technical evaluations suggest that the A14 node will offer significant performance leaps, potentially providing a 10 to 15 per cent increase in speed at the same power levels, or a massive 25 to 30 per cent reduction in power consumption at the same operating velocity compared to current 2nm wafers.